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The Configuration Problem Solver
The EPROM is not correctly connected.
Assuming that the configuration data is stored in a byte-wide PROM, EPROM or Flash-memory, ensure that the storage element is connected correctly to the board. Verify the connections to the FPGA. Check the status of CE (Chip Enable) and OE (Output Enable) pins for the proper polarity. If the PROM is not correctly enabled then the FPGA is likely to see only Logic '1's at the Data pins. |
HISTORY |
Family: XC5200 |
Mode: Master Parallel |
DONE: LOW |
INIT: HIGH |
ADD: YES |
LDC: LOW |
DOUT: NO |