Ann Duft Kathy Keller
Xilinx, Inc. Oak Ridge Public Relations
(408) 879-4726 (408) 253-5042
publicrelations@xilinx.com kathy.keller@oakridge.com
 
 
FOR IMMEDIATE RELEASE
 
XILINX ANNOUNCES NEW CORE GENERATOR TOOL WITH XILINX SMART-IP TECHNOLOGY 
 
Solution provides high performance, predictable and parameterized cores
 

SAN JOSE, Calif., Silicon Strategies '98—March 16, 1998—Xilinx, Inc. (NASDAQ: XLNX), at the Silicon Strategies '98 Conference, today announced the availability of the new CORE Generator software. The CORE Generator tool delivers highly optimized, parameterizable cores that are compatible with standard design methodologies for Xilinx field programmable gate arrays (FPGAs). This easy-to-use tool generates flexible, high performance cores with a high degree of predictability and allows customers to download future core offerings from the Xilinx web site. Both Xilinx and independent IP developers can design cores for the CORE Generator tool, which also serves as a cataloging and delivery system for related collateral for all designers using Xilinx. 

Drawing on the architectural advantages of Xilinx FPGAs new Xilinx Smart-IP technology ensures high performance, predictability, repeatability, and flexibility in core-based designs. The Smart-IP technology is incorporated in every core the CORE Generator tool delivers.

"With the Xilinx CORE Generator tool it becomes possible to implement very complex signal processing functions in a very short time and highly optimized for the Xilinx FPGA architecture," said Matthias Dressler, research and development engineer at Alcatel’s Mobile Communication Department in Stuttgart, Germany.

"Xilinx is in a unique position to deliver cores with characteristics beyond what the industry currently provides. Through the Xilinx Smart-IP technology, we are able to provide the predictability and performance, usually associated with hard cores, and the flexibility gained with soft cores," said Babak Hedayati, program director for Xilinx Core Solutions. "With the introduction of the CORE Generator, we have created an innovative core delivery mechanism for our customers."

Smart-IP technology

Cores are developed and optimized using the Xilinx Smart-IP technology that leverages the Xilinx architectural advantages, such as look-up tables (LUTs), distributed RAM, and segmented routing, and floorplanning information, such as logic mapping and relative location constraints. This technology provides the best physical layout, predictability, and performance. Additionally, these predetermined features allow for significantly reduced compile times over competing architectures. Parameterization allows for design flexibility in which users can create the exact functions they need.

Further, the utilization efficiency and performance of each parameterized core is equivalent to the best possible hand-packed design to help reduce FPGA device power dissipation. Designs with optimal layout use less programmable interconnect and thus dissipate less power with higher performance. Cores made with Smart-IP technology are unique by maintaining their performance and predictability regardless of the device size and the number of cores used in the device. Currently, Xilinx LogiCORE products incorporate Smart-IP technology. Xilinx will introduce an automated process for developing cores based on Smart-IP technology for its AllianceCORE partners later in the year.

New cores easily downloadable and integrated via the CoreLINX

Design engineers can download new Xilinx cores directly through the Xilinx web site. Once downloaded and installed, the new cores are available to the user on the next invocation of the CORE Generator. Once the tool is installed from the CD-ROM on a PC or workstation platform, future core and core update offerings can be downloaded from www.xilinx.com/products/logicore/coregen and installed for use with by the CORE Generator.

A simple flow allows core selection, custom parameterization, and core generation. The parameterized core is supported in both the Xilinx Foundation and Alliance Series environments. After the parameterized core is generated, a schematic symbol representing the core is available for use in the schematic capture or HDL instantiation code is available for inclusion in the user's HDL code.

Availability

The Xilinx CORE Generator tool is available now without charge on CD-ROM. The CD-ROM contains the CORE Generator application and 30 cores, including FIR filters, adders, accumulators, and multipliers. The tool also contains an interface for access to mainstream, system-level design tools. 

Xilinx is the leading innovator of complete programmable logic solutions, including advanced integrated circuits, software design tools, predefined system functions delivered as cores, and unparalleled field engineering support. Founded in 1984 and headquartered in San Jose, Calif., Xilinx invented the field programmable gate array (FPGA) and commands more than half of the world market for these devices today. Xilinx solutions enable customers to reduce significantly the time required to develop products for the computer, peripheral, telecommunications, networking, industrial control, instrumentation, high-reliability/military, and consumer markets. For more information, visit the Xilinx web site at www.xilinx.com.

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 Note to editors: Xilinx is a registered trademark of Xilinx, Inc. All XC-prefix product designations, Smart-IP, CORE Generator, AllianceCORE, Foundation, Alliance, and CoreLINX are trademarks of Xilinx, Inc. Other brands or product names are trademarks or registered trademarks of their respective owners.
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