Product Documentation
OrCAD Capture User Guide
Product Version 17.4-2020, June 2020

Net Generation Scenarios


When you short a bus/NetGroup to a bus/NetGroup, the short will result in:

 

Short

Generated Object (Bus or NetGroup)

Winning Bus

Generated Flat Nets

Defintion

Bus & Bus

(different width)

Bus

Higher width bus

Follow lexicographic order

NA

EXAMPLE

Bus A[0:3] - Members: A0, A1, , A2, A3

Bus B[0:5] - Members: B0, B1, B2, B3, B4, B5

 

B[0..5]

B[0..5]

A0 A1 A2 A3 B4 B5

NA

NetGroup & NetGroup - physical short

(different width)

NetGroup

Higher width NetGroup

Winning Bus defines flat nets

associated NetGroup definition should match winning bus

EXAMPLE

NetGroup S[0..5] - Members: S.JTAG0, S.JTAG1 ,S.JTAG2 ,S.JTAG3, S.JTAG4, S.JTAG5

NetGroup B[0:2] - Members: B.B0, B.B1, B.B2

 

S[0..5]

S[0..5]

S.JTAG0, S.JTAG1, S.JTAG2, S.JTAG3, S.JTAG4, S.JTAG5

S[0..5]

NetGroup & NetGroup - logical short

(different width)

NetGroup

Higher width NetGroup

Winning Bus defines flat nets

associated NetGroup definition should match winning bus

EXAMPLE

NetGroup S[0..5] - Members: S.JTAG0, S.JTAG1 ,S.JTAG2 ,S.JTAG3, S.JTAG4, S.JTAG5

NetGroup B[0:2] - Members: B.B0, B.B1, B.B2

 

S[0..5]

S[0..5]

S.JTAG0, S.JTAG1, S.JTAG2, S.JTAG3, S.JTAG4, S.JTAG5

S[0..5]

In the case of a logical (named) connection:

  • if the NetGroups aliases are different, the NetGroups are shorted together.
  • if the associated NetGroup definitions are the same, the NetGroups are shorted together.

NetGroup & NetGroup

(same width)

NetGroup

Lexicographically smaller NetGroup

Winning Bus defines flat nets

associated NetGroup definition should match winning bus

EXAMPLE

NetGroup S[0..2] - Members: S.JTAG0, S.JTAG1 ,S.JTAG2

NetGroup B[0..2] - Members: B.B0,B.B1 and B.B2

NetGroup & NetGroup - logical short

(same width)

NetGroup

Lexicographically smaller NetGroup

Winning Bus defines flat nets

associated NetGroup definition should match winning bus

EXAMPLE

NetGroup S[0..2] - Members: S.JTAG0, S.JTAG1 ,S.JTAG2

NetGroup B[0..2] - Members: B.B0,B.B1 and B.B2

In the case of a logical (named) connection, if the aliases names of both the NetGroups is the same, only then will the two NetGroups be shorted together.

 

B[0..2]

B[0..2]

B.B0,B.B1 and B.B2

B[0..2]

Bus & NetGroup

(NetGroup width higher)

NetGroup

NetGroup

Winning Bus defines flat nets

associated NetGroup definition should match winning bus

EXAMPLE

NetGroup S[0..5] - Members: S.JTAG0, S.JTAG1, S.JTAG2, S.JTAG3, S.JTAG4, S.JTAG5

Bus B[0:2] - Members: B.B0, B.B1, B.B2

 

S[0..5]

S[0..5]

S.JTAG0, S.JTAG1, S.JTAG2, S.JTAG3, S.JTAG4, S.JTAG5

S[0..5]

Bus & NetGroup

(Bus width higher)

Hybrid Bus (Bus+NetGroup)

Higher width NetGroup

Winning Bus defines flat nets

associated NetGroup definition should match winning bus

EXAMPLE

NetGroup S[0..2] - Members: S.JTAG0, S.JTAG1, S.JTAG2

Bus B[0:5] - Members: B.B0, B.B1, B.B2, B.B3, B.B4, B.B5

 

B[0..5]

B[0..5]

B.JTAG0, B.JTAG1, B.JTAG2, B3, B4 and B5

S[0..2]

Bus & NetGroup

(same width)

NetGroup

NetGroup

Winning Bus defines flat nets

associated NetGroup definition should match winning bus

EXAMPLE

NetGroup S[0..2] - Members: S.JTAG0, S.JTAG1 ,S.JTAG2

Bus B[0:2] - Members: B.B0, B.B1, B.B2

 

S[0..5]

S[0..5]

S.JTAG0, S.JTAG1, S.JTAG2

S[0..5]

NetGroup wire & NetGroup OPC/GLOBAL/PORT

(different widths)

NetGroup

NetGroup OPC/GLOBAL/PORT

Winning Bus defines

flat nets

associated NetGroup definition should match winning bus

EXAMPLE

NetGroup S[0..5] - Members: S.JTAG0, S.JTAG1 ,S.JTAG2, S.JTAG3, S.JTAG4, S.JTAG5

NetGroup OPC B[0..2] - Members: B.B0, B.B1, B.B2

 

B[0..2]

B[0..2]

B.B0, B.B1, S.JTAG2, S.JTAG3, S.JTAG4, S.JTAG5

B[0..2]

Bus & NetGroup OPC/GLOBAL/PORT

(NetGroup width higher)

NetGroup

NetGroup OPC/GLOBAL/PORT

Winning Bus defines

flat nets

associated NetGroup definition should match winning bus

EXAMPLE

NetGroup OPC S[0..5] - Members: S.JTAG0, S.JTAG1, S.JTAG2, S.JTAG3, S.JTAG4, S.JTAG5

Bus B[0:2] - Members: B.B0, B.B1, B.B2

 

S[0..5]

S[0..5]

S.JTAG0, S.JTAG1, S.JTAG2, S.JTAG3, S.JTAG4, S.JTAG5

S[0..5]

Bus & NetGroup OPC/GLOBAL/PORT

(bus width higher)

NetGroup

NetGroup OPC/GLOBAL/PORT

Winning Bus defines

flat nets

associated NetGroup definition should match winning bus

EXAMPLE

NetGroup S[0..5] - Members: S.JTAG0, S.JTAG1, S.JTAG2, S.JTAG3, S.JTAG4, S.JTAG5

Bus OPC B[0:2] - Members: B.B0, B.B1, B.B2

S[0..2]

S[0..2]

S.JTAG0, S.JTAG1, S.JTAG2, B3,B4,B5

S[0..2]

NetGroup wire and Bus OPC/GLOBAL/PORT

(NetGroup width higher)

Bus

Bus OPC/GLOBAL/PORT

Winning Bus defines

flat nets

associated NetGroup definition should match winning bus

EXAMPLE

NetGroup S[0..2] - Members: S.JTAG0, S.JTAG1, S.JTAG2

Bus OPC B[0:5] - Members: B.B0, B.B1, B.B2, B.B3, B.B4, B.B5

S[0..2]

S[0..2]

B0,B1, B2, S.JTAG3, S.JTAG4, S.JTAG5

S[0..5]

NetGroup wire and Bus OPC/GLOBAL/PORT

(bus width higher)

Bus

Bus OPC/GLOBAL/PORT

Winning Bus defines

flat nets

associated NetGroup definition should match winning bus

EXAMPLE

NetGroup S[0..2] - Members: S.JTAG0, S.JTAG1, S.JTAG2

Bus OPC B[0:5] - Members: B.B0, B.B1, B.B2, B.B3, B.B4, B.B5

B[0..5]

B[0..5]

B0,B1, B2, B3,B4,B5

S[0..2]

NetGroup wire and NetGroup connector

NetGroup

NetGroup connector

Winning Bus defines

flat nets

associated NetGroup definition should match winning bus

NetGroup connector and NetGroup connector

NetGroup

Lexicographically smaller NetGroup connector

Winning Bus defines

flat nets

associated NetGroup definition should match winning bus