Thank you for the information regarding the DC-WG work. I think,
it is necessary to discuss any potential overlaps between this
and the IEEE P1500 embedded core test standardization effort.
I think, it will be a good start to hear what Adam will present
at the next IEEE P1500 meeting in Monterey (4/29).
Thanks,
Yervant Zorian,
Working Group Chair, IEEE P1500
Osseiran Adam wrote:
>
> S. Bhawmik wrote:
> >
> > Hi,
> > I'm Sudipta Bhawmik (Bell Labs, Lucent Technologies). I came to know
> > of this effort (DC-WG) from my colleague David W. Potter.
> > Looking at the charter and objectives of this group, I thought
> > it might be appropriate to sensitize the members of this group
> > about the IEEE P1500 standardization effort (I'm sure though that
> > many of you are already aware of this effort). The objectives of
> > IEEE P1500 is to develop standards for IP core test control and access
> > mechanism and a standard core test description language. Since
> > Test and Testability is a major component of a design intent, I think
> > there exists enough common ground between DC-WG and IEEE P1500.
> > I am specially concerned about the two parallel language development
> > efforts which can either result in lot of redundancy or force the
> > designers to create separate descriptions for design intent/constraints
> > and test/testability.
> > In order to avoid this problem, I think DC-WG and P1500 should talk to
> > each other and establish a liasoning process to avoid duplicacy and/or
> > conflicts. P1500 has already an estabished liasoning with VSIA.
>
> Hello,
>
> I am Adam Osseiran from the Engineering Institute of Geneva-Switzerland.
> I attended the last DC-WG meeting in santa Clara and made on it a simple
> information report for the European companies belonging to VSIA through
> ECSI (European CAD Standardization Initiative) VSIA representative in
> Europe.
> Minutes of the meeting are also available on the net. Marc Hahn (DC-WG
> chair) created the DC-WG site:
> http://www.vhdl.org/dcwg/
> I will try to present what I know of the DC-WG at the next P1500 WG
> meeting at VTS in Monterey next may 1st.
> I guess that harmonization of efforts should be benefical to all
> parties.
>
> Regards,
>
> --
> Adam Osseiran
>
> Microelectronics Lab Laboratoire de microelectronique
> Engineering Institute of Geneva Ecole d'Ingenieurs de Geneve
> 4, rue de la prairie 4, rue de la prairie
> 1202 Geneva, Switzerland 1202 Geneve, Suisse
>
> Tel: +41-22-344 77 50 (ext 282)
> Fax: +41-22-344 92 88
> Email: osseiran@eig.unige.ch