Attendees:
  Mark Hahn, Cadence (Chair)
  Tom Dewey, Mentor Graphics
  Bob Dilly, IBM
  Ibna Faruque, Synopsys
  Steve Grout, Sematech
  Dan Moritz, LSI Logic
  Greg Schulte, Cadence (formerly Ambit)
  Jim Swift, IBM
New action items:
      Who         When     What
      ----------  ------   --------
 1.   Jim         10/27    Check whether there are any patents which
Open action items:
      Who         When     What
      ----------  ------   --------
 1.   Steve, Jim, 11/24    Discuss PVT-dependent constraints and relationship
      Greg                 to conceptual model
 2.   Jim         9/15     Investigate IBM strawman possibility
                  -> 9/29
                  -> 10/13
                  -> 10/27
                  -> 11/10
 3.   Jim         10/13    Add operating conditions to the taxonomy
                  -> 11/10
 4.   Jim         10/27    Check whether there are any patents which
                  -> 11/10 might affect the IBM strawman donation
 5.   Jim         10/27    Investigate whether the strawman would include
                  -> 11/10 just the Einstimer command reference or also the
                           introductory manual and educational material
 6.   Mark, Greg  10/27    Come up with a proposal for the semantics of
                           how source latency and jitter, common ambiguity,
                           common jitter, and inter-clock uncertainty relate
 7.   Mark, Dan   10/27    Refine the task breakdown, updating it to reflect
                  -> 11/10 the DC-WG/SLDL sub-committee
 8.   Mark        10/27    Talk with Larry Pillegi about potential DC-WG
                  -> 11/10 activities at Tau '99
Closed action items:
      Who         When     What
      ----------  ------   --------
 1.   Mark        10/13    Schedule a face to face meeting at ICCAD
                  -> 10/27
 2.   Vassilios   10/27    Provide IBM with a copy of the template for
                           transferring copyright to OVI
 3.   Mark        10/27    Coordinate first couple of meetings for the
                           joint DC-WG/SLDL sub-committee
 4.   Mark, Steve 10/27    Create a reflector and web site for the joint
                           sub-committee
 5.   Mark        10/27    Create a diagram showing the relationship between
                           DC-WG and SLDL
 6.   Dan         10/27    Give feedback to Steve Grout about parasitics
                           boundary conditions
 7.   Mark        10/27    Split taxonomy document into sub-documents
                           for each major section
Next Meeting:
  The next meeting will be a face to face meeting
  at ICCAD on Tuesday, 11/10/98, from 12:30-2:00 pm PDT.
  There will be a simultaneous teleconference.
Details:
  1. Review progress on action items
     No progress on the IBM patents or operating conditions.  The
     IBM strawman document is nearly ready after being scrubbed.
     Jim plans to ask about the availability of the training manual
     when meeting with the Fishkill group on 10/28.
     Mark set up the face to face meeting at ICCAD, and Jim confirmed
     that Vassilios had provided IBM with the template for transferring
     copyright to OVI.
     Mark proposed having the DC-WG/SLDL joint working group meetings
     on alternate weeks in the same time slot as the DC-WG teleconference;
     the proposal was accepted.  Steve indicated the reflector for the
     joint working group would be set up on 10/27.
     Mark previously distributed a presentation on the joint working group.
     We reviewed it and everyone agreed it was a reasonable summary.
     Dan sent mail to Steve on the boundary parasitics, and Mark also
     talked with Steve.  Mark split the taxonomy document and posted
     it on the web site; we agreed to switch to using Office '97 for
     the document.
  2. Discuss tasks and schedule
     We skipped this, since Mark hadn't had time to complete the
     schedule before the meeting.
  3. Review clock uncertainty proposal
     Mark described the proposal for handling inter-clock uncertainty
     and how it relates to jitter, which is basically to have two
     separate parameters: the inter-clock jitter, and the inter-clock
     insertion delay uncertainty.  There is a need to control whether
     the insertion delay uncertainty should be interpreted as overriding
     or adding to any computed difference in insertion delay.
  4. Discuss agenda for face to face meeting
     We discussed several items including
     - tasks and schedule
     - operating conditions
     - constraints on non-clock buffer trees
     - slew limits
Thanks,
Mark
-- Mark Hahn phone: (408) 428-5399 Architect, Deep Submicron Business Unit fax: (408) 428-5959 Cadence Design Systems email: mhahn@cadence.com