DC-WG: Constriants review on DCWG Agenda 5/16


Subject: DC-WG: Constriants review on DCWG Agenda 5/16
From: sharmav@us.ibm.com
Date: Fri May 05 2000 - 11:39:24 PDT


Mark,

Could we review the following proposed changes to the DCDL syntax on 5/16.

1. The external load command in the current version of the spec is
insufficient to
 address asserting wire and pin capacitance. I propose that we either add
options
 to external load command or create two separate commands in the Parasitics
section
to address this capability,

The syntax proposal is as follows,

wire_capacitance -total_cap double | -wire_cap double -nets / -pins
list of strings
-process worst_case / best_case / nominal

pin_capacitance -value double -pins list of strings -process
worst_case / best_case /nominal

et::set_driving_cell
2. driver_specification

Add the rise/fall, from pin , library and multiply options to the
driver_specification

         -rise string

         Specifies the name of the library cell driving the specified port for the rise transition only

     -fall string

         Specifies the name of the library cell driving the specified port for the fall transition only

  -from_pin string

         Specifies the name of the input pin on the library cell driving this port. This pin will be used for both rise and fall transitions.

     -multiply_by double

         Specifies the multiplication factor for delays and slews.

3. Disable command should allow library cells

-Vikas



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