Subject: DC-WG: 6/20 meeting minutes
From: Mark Hahn (mhahn@cadence.com)
Date: Tue Jun 27 2000 - 06:30:31 PDT
Meeting minutes from the 6/20/00 DC-WG teleconference
-----------------------------------------------------
Attendees:
  Mark Hahn, Cadence
  Paul Bonnel, Cadence
  Tom Dewey, Mentor
  Bob Dilly, IBM
  Vikas Sharma, IBM
New action items:
      Who         When     What
      ----------  ------   --------
 1.   Mark        6/27     Check on absolute versus increment semantics
                           for clock_uncertainty
 2.   Mark        6/27     Create a list of additional commands which
                           could use -absolute and -increment or -worst
Open action items:
      Who         When     What
      ----------  ------   --------
 1.   Mark        6/20     Check on semantics for clock waveforms with
                  -> 6/27  edges shifted by one or more cycles from equivalent
                           minimum edge times
 2.   Bob         6/20     Prepare waveform diagrams for waveform and
                  -> 6/27  derived_waveform
 3.   Mark        6/20     Check on phase shift in derived_waveform
                  -> 6/27  (effect on ideal edge position versus effective
                           edge position)
 4.   Mark        6/20     Check whether derived_waveform frequency adjustments
                  -> 6/27  can be real numbers
Next Meeting:
  The next meeting will be a teleconference on 6/27/00
  from 10-12 am (PDT)
Details:
  1. DAC reports
     Not much feedback from Kent Moffet and Karla Reynolds.
  2. Action items
     Bob and Mark both deferred their action items to 6/27; Bob
     made some progress on the waveform diagrams but didn't finish yet.
  3. Terminology and clock_required_time
     We reviewed and approved the Basic Terminology section with
     no changes.  We made minor changes to the clock_required_time
     semantics description.
  4. derived_clock
     We agreed to merge the derived_clock functionality into the
     clock command by adding options for specifying the parent
     clock root as a port or pin.  The parent clock root is used
     in automatically calculating the actual phase shift between
     the parent clock root and the derived clock root.
  5. clock_uncertainty
     We agreed to use -from/-to instead of -source/-target, for
     consistency with the disable command.  We also changed the
     value type to a list of one or two values (early and late),
     and tentatively changed the default semantics to -increment,
     pending Mark's action item.
Thanks,
Mark
-- Mark Hahn phone: (408) 428-5399 Senior Architect fax: (408) 894-3479 Cadence Design Systems email: mhahn@cadence.com
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