ISAC: Minutes from meeting on 10 October 2007

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Minutes of ISAC meeting held via telecom on 10 October 2007

Present: Peter Ashenden, Larry Soule, Chuck Swart, Ajay Verikat

Absent: Jim Lewis, Lance Thompson

Next Meeting Wednesday, November 07, 8 pm Pacific Standard Time
             (Thursday, November 08, 4 am GMT)

TOPIC: IR 2122 Protected method has implied object parameter?

The analysis is accepted. The IR is ISAC-APPROVED.

ACTION: Chuck to forward to VASG.

TOPIC: IR 2123 Process resumption and callbacks

Support for VHPI in 1076C resulted in a finer granularity in the
simulation cycle. The LRM contains certain conflicting statements in
the LRM about when and whether a process resumes. These conflicts had
no meaningful effect until the VHPI changes were added. So the
resolution of this issue depends, at least in part, on the needs of
VHPI.

This issue has uncovered a problem in resolving LRM issues. The LRM
now contains many areas which are not part of the VHDL "core" and in
which the ISAC does not necessarily have expertise. Such areas include
VHPI, encryption, PSL, and the various packages in the IEEE
library. It would be unreasonable to draft experts in these areas into
the ISAC for the relatively infrequent occurrences of problems in
these specialized areas.  Instead, the ISAC recommends that the VASG
keep standing committees with expertise in each specialty area. The
ISAC will serve as a clearing house to refer specialty issues to the
appropriate group or groups and to resolve conflicting technical
solutions proposed by various groups. In addition, each specialty
group will be expected to examine each new IR and identify those IRs
which have an impact in its area. The ISAC will continue to resolve
issues involving core language features.

ACTION: Chuck to contact VHPI chair about this issue. Chuck to pass
"specialty group" recommendation to VASG chair.

TOPIC: IR 2124 Ordering of process execution and callbacks

This IR identifies certain points in the simulation cycle which overly
restrict process ordering from the perspective of simulation
performance. These restrictions were added to support VHPI, and it may
be the case that they were not intended by the VHPI, so response from
that group is necessary to resolve this issue.

ACTION: Chuck to contact VHPI chair about this issue.

TOPIC: IR 2125 Resolved for std_ulogic is broken for '-'

Peter has sent an email in response to this issue and Jim has emailed
a reply. The submitter claims that a change to the resolution function
to allow better '-' propagation would improve testbench writing. The
ISAC is concerned that a backwards incompatible change to such a
stable and long-lasting language feature could have undesirable
consequences.  In addition, for the particular application he seeks,
the submitter could write his own resolution function with few changes
needed in his code. New VHDL-200X features allow type-compatible
resolution function changes to vectors as well as scalars.

The submitter's comments show that he is trying to implement something
like bundles or Verilog mod ports. This requirement has not yet been
met by a language revision.

The ISAC believes that significant input is needed from the user
community before the change to the resolution function can be made,
but that the requirements committee is the correct forum to gather
and synthesize this information.

ACTION: Chuck to prepare a preliminary analysis reflecting the emails
and this discussion, circulate that analysis to the ISAC for review by
10/17, then forward the IR as a requirement.

ISSUE: IR 2099 Alias declarations introduce homographs

This IR has been extensively reviewed and analyzed. Its time for an
ISAC vote.

ACTION: ALL to vote on this IR by Wednesday 10/17.

TOPIC: IR 2110 Implicit subtype conversions not defined

This IR has been superseded by Bugzilla #174 as it currently stands.

ACTION: Chuck to mark this "Superseded" when Bugzilla #174 is approved.

TOPIC: IR 2120 How to access objects in higher level nested protected type

This is ready for an ISAC vote.

ACTION: ALL to vote on this by Wednesday, 10/17/2007.

TOPIC: IR 2121 Allow for vectors to have assigns and opens in the port map

Chuck's analysis of problems, especially those involving use of
default expressions, is considered appropriate for the VASG but too
confusing for comp.lang.vhdl. Ajay did not receive the analysis until
a copy was sent at the meeting, so he was unable to review it
adequately. Therefore, Chuck will incorporate the analysis into the
IR, submit it to the ISAC for review, then forward it to the
requirements committee.

ACTION: Chuck to revise the IR, ALL to review by 10/17/2007, Chuck to
forward to requirements.