Attached is this new IR. Its also available at the website. Chuck Swart -- This message has been scanned for viruses and dangerous content by MailScanner, and is believed to be clean. VHDL Issue Number: 2129 Language_Version Accellera Standard VHDL-2006-D3.0 Classification Language Definition Problem Summary Bad requirements to check exprs with access type sub exprs Relevant_LRM_Sections Section 6.1 Names in which it states: If the type of the prefix is an access type, the evaluation of the prefix includes the determination of the object designated by the corresponding access value. In such a case, it is an error if the value of the prefix is a null access value. Related_Issues Key_Words_and_Phrases Authors_Name John Shields Authors_Phone_Number 503-685-0837 Authors_Fax_Number Authors_Email_Address john_shields@mentor.com Authors_Affiliation Mentor Graphics, Inc. Authors_Address1 8005 SW Boeckman Rd. Authors_Address2 Wilsonville, OR 97070 Authors_Address3 Current Status: Submitted Superseded By: ------------------------ Date Submitted: 17 January 2008 Date Analyzed: Author of Analysis: Revision Number: 0 Date Last Revised: Description of Problem ---------------------- The implication of this appears to be that in the runtime evaluation of expressions, every subexpression that dereferences an access type must be checked for null. In an example like this: entity top is end top; architecture arch of top is type intlistelement; type intlistpointer is access intlistelement; type intlistelement is record element : integer; nextelem : intlistpointer; end record intlistelement; procedure increment (N: Integer :: 1) is variable countptr:intlistpointer;-- := new intlistelement'(0,null); begin countptr.all.element := countptr.all.element + (n-1); end procedure increment; begin p: process begin increment(5); wait; end process; end; The rhs of the var assign stmt must check for null. It is certainly uncommon in other languages to require this kind of safety and there is a serious performance penalty. Proposed Resolution ------------------- I would like to see this kind of error be erroneous. It is incongruous to me that the language requires this, but allows an access variable to be deallocated and potentially cause erroneous behavior. VHDL would better serve users to provide the degree of freedom for better performance. It is a related consideration to change the memory allocation model to employ garbage collection, which would go along way to improve the safety of access types and dynamic data. These things will take on increased significance if VHDL make better use of dynamic data in verification scenarios. VASG-ISAC Analysis & Rationale ------------------------------ TBD VASG-ISAC Recommendation for IEEE Std 1076-2002 ----------------------------------------------- TBD VASG-ISAC Recommendation for Future Revisions --------------------------------------------- TBDReceived on Mon Jan 28 13:40:13 2008
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