> We at Cadence believe that the decision which language to use for DUT > and BFM modeling (SystemVerilog, VHDL or Verilog 2001) should be made by > our customers and that a SCE-MI 2.0 standard should respect this > assumption and provide a solution that does not compromise the needs of > any of the SystemVerilog, Verilog 2001 and the VHDL communities. This leads to the following question: For a SCE-MI implementation to be considered compliant must it support all languages supported by the standard, or is there a concept of a compliant SystemVerilog implementation, etc.? This of course also extends to C versus C++ support. Per -- Per Bojsen Email: <bojsen@zaiqtech.com> Zaiq Technologies, Inc. WWW: http://www.zaiqtech.com 78 Dragon Ct. Tel: 781 721 8229 Woburn, MA 01801 Fax: 781 932 7488Received on Thu Sep 15 13:30:13 2005
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