[sv-cc] Ballot for Final Approval Vote

1. Statement:"SV-CC accepts LRM Draft 5 as the SystemVerilog
   3.1A standard and recommends forwarding it to the Accellera
   board for its approval."

2. Eligible companies: Based on attendance and other Accellera
   rules, the following companies are eligible to vote:
   
   - Cadence Design Systems
   - Mentor Graphics
   - Motorola, Inc.
   - Novas Software
   - Synopsys, Inc.
 
3. Rules:

   1. All rules related to Accellera voting guidelines apply.
   If there is any conflict between Accellera rules and rules
   given below, Accellera rules will take precedence. Accellera
   TCC reserves the right to decide on any conflict.

   2. Only one from each company is allowed. In case of multiple
   people vote from the same company, only the first vote is
   counted.

   3. Casting options are (1) YES, (2) NO and (3) ABSTAIN.
   Any other preference will disqualify a vote.

   4A. This is a CLOSED vote to reduce discussion on the voting
   itself and to keep privacy of the member companies. Please
   send your cast to the chair (mittra@juno.com) AND the co-chair
   (ghassan.khoory@synopsys.com).

   4B. The result and the voting tally will be made public
   *after* the voting period is over.

   4C. In case, any member wants to make its voting preference
   public, it is allowed to send the vote to the sv-cc reflector;
   however, sv-cc will honor privacy of companies who do not
   wish to make their choice public during the voting period.

   5. The vote closes on 15th March, 2004. The result will be
   published on 17th March, 2004.

--
Swapnajit Mittra
Project VeriPage ::: http://www.angelfire.com/ca/verilog
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