- + Issue 1: Truncating vs Rounding when converting Analog to Digital times.

[Kevin Cameron, 03 Jan 2001]


^ Issue

Time Continued

When discussing time in a mixed simulation it is useful to consider "events" happening on a universal (continuous) "time line". The "digital" time is a particular view of the universal time (i.e. rounded to some multiple of the digital "tick" for Verilog). From a user perspective Verilog-AMS should appear to have a "conservative" 1 simulation algorithm - i.e. things cannot be scheduled backward in time - and describing the timing the A/D boundary event exchange in terms of digital times confuses this issue.


1Optimistic algorithms allow backward scheduling, but usually require the support of a "history" mechanism to make them look "conservative".