Re: MOS11 noise implementation in Verilog-A

Vassilios:
My apologies for toeing the line on this issue. You will find
that the LRM draft does not contain any such references (except
to "Spice", which was already present in the approved LRM 2.1).

In this particular message, I was trying to show that a particular
feature of a compact model did not require an extension. It is
critical to determine whether the extension is required, because
it is the CM subcommittee's goal to ensure that all existing
compact models can be implemented in Verilog-AMS.

The particular noise function in question is somewhat complicated
to understand; figuring out whether my Verilog-A code "does the
right thing" would be a lot simpler if we had a simulator that
could give us a number to compare the Verilog-A implementation
with the result from the model as built-in to the C code.

I will try harder to remember to talk about general simulators.
-Geoffrey

Vassilios.Gerousis@infineon.com wrote:
>
> We should be careful in using tool product names and their ability to
> support or not to support certain functionality. Please use generic
> terminology and focus on what the standard should support. Accellera as
> a non-profit organization disallows such references (Verilog-A
> compilers, Colin Simulator, ADMS, etc.). The committee is implementing a
> standard for the industry and not for one specific tool or a specific
> simulator.
>
> The committee should address proposals based on technical merits as the
> primary focus, second is the ease or difficulty of modeling , third can
> discuss "the possible" ease or difficulty of building parsers or
> simulators "without a reference to a product".
>
> I suggest that topics like noise modeling can be discussed in terms
> assigning noise to variable, noise as nodes or ports, and/or noise
> language extensions.
>
> I would appreciate your cooperation on this matter.
>
> Vassilios
Received on Thu May 20 08:17:14 2004