Subject: Re: Attributes
From: Jonathan Sanders (jons@cadence.com)
Date: Sun Feb 25 2001 - 14:16:43 PST
Ian,
Attributes have existed since the days of XL but are now being formalized in
Verilog 2001. I believe the primarily purpose is to use this feature as a
method
to implement vendor independent features. I know we use it and I believe the
examples I have seen have been for Synopsys synthesis properties. It certainly
was not intended as a prototyping mechanism although that may be a way that
some vendors use it.
Knowing the properties that we pass into the simulator via attributes and what
I have seen fro Synopsys in the past I don't think that conflicts are
likely. You
have to almost want to use the same name or are implementing something very
similar. The rules are if you don't understand then you must ignore them
which
is why this is more of a vendor specific feature mechanism.
The real question is are attributes the correct way to deal with adding
features
to the language? (Your question) And if so then just like system tasks these
would need to be defined and if a vendor uses the same name as one of the
public ones then let them be scolded by their users. I believe that this
is probably
a viable way to add certain functionality to the language but we should be
cautious
when doing this as it imposes a new set of problems.
Jon
At 11:11 AM 2/22/01, Ian Wilson wrote:
> >
> > BTW, where does everyone stand on attributes - is everyone
> implementing
> > the general purpose attribute scheme?
> >
> > Kev.
> >
>
>Attributes strike me as a useful prototyping mechanism, for doing
>compile-time jobs for which system tasks, etc, can't be used.
>
>Because they are essentially structured text, they don't provide
>the robustness that syntactical additions to the language can.
>I don't think that the 1394-2000 attribute extensions provide a
>set of rules to avoid collisions over attribute usage. This is
>likely to be a significant source of portability problems if
>used to implement additions to AMS that belong in the language
>proper.
>
>And yes, we implement the general purpose attribute scheme.
>
>--ian
***********************************************************
Jonathan L. Sanders
Product Engineering Director
Mixed Signal and Physical Verification Solutions
Cadence Design Systems, Inc.
555 River Oaks Pkwy
San Jose, CA. 95134
INTERNET:jons@cadence.com Tel: (408) 428-5654 Fax : (408) 944-7265
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