Subject: net_resolution (second iteration)
From: Ian Wilson (imw@antrim.com)
Date: Tue Feb 27 2001 - 09:34:27 PST
Here are the relevant sections, reworked to include feedback from
Dan and Jon. I haven't changed the modeling aspects of the example.
--ian
8.10.1-3, 8.11
- change "$driver" to "driver".
8.10.5
- change title from "net_resolution" to "Driver-Receiver Access in Connect Modules"
- replace body by:
In a mixed net - that is, one containing discrete and continuous drivers and
loads, the drivers and receivers of that net are decoupled. If both discrete
drivers and loads are present on a mixed net, a bidirectional connect module
(that is, one where the digital port is of type inout) is required. The outputs
of the discrete drivers are combined using standard Verilog-D resolution mechanisms.
This resolved value may be accessed in the connect module by reading the inout
port. The loads can be driven by writing to the inout port. Although the
same identifier is used for the input and output directions of the port,
the effect is the same as if there were distinct, unidirectional, ports.
No default processing is applied within a connect module. The output side of
the digital port must be driven explicitly with a continuous assignment
or equivalent (see following section for an example).
When only discrete drivers, or loads, but not both, are present on a mixed net,
no segregation takes place. In this case, the drivers can be accessed by reading
(for an input port) and the loads can be driven by writing (for an output port).
The information returned by the driver access functions shall exclude any
drivers contributed by the connect module instance itself. For example, if the
connect module instance adds a driver for the discrete output (or inout) port,
this driver shall not add to the value returned by the driver_count() function.
8.10.6
- replace body by:
connectmodule c2e(d, a);
cmos1 d; inout d;
electrical a; inout a;
reg out;
ground gnd;
electrical rail;
branch pull_up(rail,a), pull_dn(a,gnd), power(rail,gnd);
parameter real r0 = 120.0, r1 = 100.0, roff = 1e6;
parameter real vt_hi = 3.5, vt_lo = 1.5, supply = 5.0;
integer i, num_ones, num_zeros;
assign d = out; // drive the receivers on the mixed net
// count active drivers & configure analog output section
analog begin
@(driver_update(d)) begin
num_ones = 0;
num_zeros = 0;
for(i = 0; i < $driver_count(d); i = i + 1)
if(driver_state(i) == 1`b1) num_ones = num_ones + 1;
else if(driver_state(i) == 1`b0) num_zeros = num_zeros + 1;
end
// analog drivers, configured according to active drivers & levels
V(pull_up) <+ 1/((1/r1)*num_ones + (1/roff)) * I(pull_up);
V(pull_dn) <+ 1/((1/r0)*num_zeros +(1/roff)) * I(pull_dn);
V(power) <+ supply;
end
// monitor analog output and drive digital output accordingly
always @(cross(V(a)-vt_hi, -1) or
cross(V(a)-vt_lo, +1)) out = 1`bx;
always @(cross(V(a)-vt_hi, +1) out = 1`b1;
always @(cross(V(a)-vt_lo, -1) out = 1`b0;
endconnectmodule
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