Subject: RE: ...digital variable access
From: Ian Wilson (imw@antrim.com)
Date: Wed Mar 21 2001 - 14:18:03 PST
> > wire w;
> > real r;
> > electrical out;
> > analog begin
> > r = w;
> > V(out) <+ transition(5.0 * r, ....);
> > end
>
> Are you implying that the analog process is evaulated when 'w' changes?
Yes. Or, rather, that when a change is scheduled for w on the digital
side, that the analog side is notified when the change occurs.
This makes the behavior equivalent to its structural equivalent: insert
a d/a converter and assign the (synchronized) output of that to r.
>
> Should it be explicit? -
>
> ...
> analog begin
> @(w) r = w;
> V(out) <+ transition(5.0 * r, ....);
> end
>
There seems to be agreement that this should be implicit.
> - and would that be equivalent to using 'wreal' in :
>
> wire w;
> wreal r;
> always @(w) r = 5.0 * w;
> analog V(out) <+ transition(r, ....);
>
> - not that I like wreal :-)
>
I don't understand the semantics of wreal in the context of
mixed signal, sorry ..
--ian
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