Subject: Re: Workgroup status (II)
From: Srikanth Chandrasekaran (schandra@asc.corp.mot.com)
Date: Thu Mar 29 2001 - 18:46:39 PST
Reply To: schandra@asc.corp.mot.com
Organization: Motorola Australia Software Center
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#Sri wrote:
#
#>1. Does this mean that "Discipline Resolution" has been resolved
#>or it is not being addressed in the next version? There were lots
#>of discussions, and we have some idea (which we can submit as
#>a proposal), which we could discuss on.
#
#If you send me your proposal I'll upload it for comments.
Shall work on that depending on what Antrim and Cadence has...
#I put up a short proposal on the web-site -
#(http://www.eda.org/verilog-ams/hm/0139.html)
#http://www.eda.org/verilog-ams/htmlpages/tc-docs/issues/0002/fllwup-2.html
#
#- I havn't seen any feedback yet.
We will have a look at this here...Sorry that i missed this one on
discipline resolution.
#We've had this battle before and it wasted a lot of time, so my proposal is to let the users do it either way. Personally I think Ian/Antrim's approach is more "correct", but Cadence's approach is more "user friendly" in some design methodologies.
Are these two approaches documented and put on the webpage. If so,
is that possible to do that...I know that there were heaps of mails
sent regarding this problem, bit it was almost impossible to figure
out from the mail what Ian(Antrim's) idea on the resolution is
and what cadence had done, because the current one is more or less
ambigous.
I will check this proposal also.
Thanks for your mail.
cheers,
Sri
#A related issue is "Discipline Compatibility" -
#
#http://www.eda.org/verilog-ams/htmlpages/tc-docs/issues/0014/index.html
#
#- which someone might like to roll into a bigger proposal.
#
#Kev.
#--
#National Semiconductor
#2900 Semiconductor Drive, Mail Stop D3-677, Santa Clara, CA 95052-8090
#
-- Srikanth Chandrasekaran EDA Solutions and Products SBU Phone: +61-8-8203 3592 Fax: x3501 email: schandra@asc.corp.mot.com
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