Some questions on connect module placements


Subject: Some questions on connect module placements
From: S. Peter Liebmann (spl@antrim.com)
Date: Tue Aug 21 2001 - 11:47:28 PDT


I started looking at chapter 8 in the LRM. In order
to understand it, I made a summary (as I interpret it)
of those sections which have to do with adding interface
elements.
I also have a few questions based on the summary.
I would like someone to a) tell me if my summary is correct
and b) answer the questions.

Summary:

1. Connect modules are inserted between ports and
   signals when one is in the continuous (analog)
   domain, and the other in the discrete domain
   (digital). - 8.8.

2. In order to find out which domains to connect and the
   type of connect modules, all ports must have a discipline.

3. For those ports with standard digital qualifiers, (wire, reg
   ...) default disciplines may be defined with a compiler directive -
   `default_discipline (3.6).

4. For those ports without qualifiers (in modules with no
   behavior affecting the ports - for example, when a port
   is used only in an instantiation or primitive), some
   sort of discipline resolution is needed to satisfy
   1 and 2 (8.4).

5. Once all ports have disciplines, the connect modules
   are then added down the hierarchy when a port of
   module A with a discrete discipline (d_A1)
   is connected (mapped) to a port in module B with
   with a continuous discipline (c_B1) - i.e. module
   A instantiates module B.

I have some questions based on the following example:

-----------------------------------------------------
  `timescale 100ns / 10ns
   `default_discipline logic
  `include "constants.h"
  `include "disciplines.h"
  `include "connect.h"

  module top;
   electrical in;
   branch (in) Bin;
   test1 t1(in);
   analog begin
    V(in)<+5;
    I(Bin)<+ddt(V(in)*1p);
   end
endmodule

 module test1(in);
   inout in;
   wire n1,in,out;
   rc t1(in,n1);
   rc t2 (n1,out);
endmodule /* test1 */
   

 module rc(in,out);
   inout in,out;
   electrical in,out;
   analog begin
      I(in,out)<+V(in,out)/100.0;
      I(out)<+ddt(V(out)*1e-9);
   end

endmodule /* test */
---------------------------------------------------
The above example is a pure analog circuit which is
a simple example of a control system. It is a voltage
source and a capacitor to ground driving 2 low pass
filters (rc) in series.

Questions:

1. According to 5 there will be an atod connect module for
   "in" between the top level module and test1, and
   an dtoa between "test1" and "rc". Am I correct?

2. Do those connect modules cancel each other and, if so,
   can they be optimized out? (there are no digital elements,
   so, as far as I can tell why do we need interface elements?).

3. Other companies (Avanti and Mentor in particular) have tools
   to add interface elements. Can someone (Dave) tell me how they
   would handle the above example?

-- 
Peter Liebmann        

Antrim Design Systems, Inc. Tel. 831-430-4804 Fax. 831-430-1904



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