Subject: Re: Minutes of Verilog-AMS LRM call (9th Sept)
From: Srikanth Chandrasekaran (schandra@asc.corp.mot.com)
Date: Wed Sep 11 2002 - 17:34:58 PDT
Hi David,
Thanks for raising this issue.
The digital reference for LRM 2.0 was the 1995 Std. This would not change in
LRM 2.1 which is expected in the next month or so.
For LRM 2.2, the major change that i have been planning is revamping the BNF
which is incomplete and not clearly defined at some places so that we can look
at the LRM 2.2 BNF and it will be a more meaningful document with respect to
analog, digital and mixed signal. Now, whether 2.2 is going to sync up with
1995 or 2001 is not yet clear. The reason for this is the fact that there are
plans to Sync up with SystemVerilog in to the Verilog-AMS LRM. So we might
move directly from 1995, to SystemVerilog.
Unless i dont see any effort in sync up with SystemVerilog then we might have
to take a decision after the release of LRM2.1 to move to 2001, because i
agree with you in the sense that 1995 is not a std, and we should move to the
current digital std.
Regards,
Sri
David W. Smith writes:
#
#How is the 2.1 or 2.2 BNF going to compare with Verilog 2001? I noticed
#that the reference below was to 1995 (which according to IEEE policy is
#no longer a standard).
#
#Regards
#David
#
#David W. Smith
#Synopsys Scientist
#
#Synopsys, Inc.
#Synopsys Technology Park
#2025 NW Cornelius Pass Road
#Hillsboro, OR 97124
#
#Voice: 503.547.6467
#Main: 503.547.6000
#FAX: 503.547.6906
#Email: david.smith@synopsys.com
#http://www.synopsys.com
#
#
#
#-----Original Message-----
#From: owner-verilog-ams@eda.org [mailto:owner-verilog-ams@eda.org] On
#Behalf Of Srikanth Chandrasekaran
#Sent: Wednesday, September 11, 2002 12:48 AM
#To: Verilog-AMS Committee
#Subject: Minutes of Verilog-AMS LRM call (9th Sept)
#
#
#Attendees: Sri, Graham (Motorola), Martin, Jon (Cadence)
#Date: 9th Sept 2002
#
#* The freeze date for LRM changes have been moved from Sept 16th to Sept
#23nd.
#
#* The following issues will be discussed next monday and the monday
#after
# that. Any proposal updated in the LRM document not submitted before
#Sept
# 22nd shall not be reviewed as part of 2.1.
#
# 1. Support of instantiating digital primitives in analog blocks
# 2. `default_discipline usage dealing with digital and analog
#primitives
# 3. wreal issues with the current LRM
# 4. sychronization updates from Martin
#
# - Issues 1, 2 have been previously submitted to the LRM committee in
#textual
# format. However for review purposes these are to be updated in the
# relavent sections of the LRM and reviewed. These two are expected to
#be
# reviewed for 16 Sept
#
# 5. closure on the `include proposal sent by Kevin.
#
#* The BNF for the LRM is being reworked upon because the current BNF is
# 1. incomplete
# 2. Not very clear when it comes to digital/analog definitions
#
# - Graham has been working on reworking the AMS BNF taking into account
#the
# current 1995 std reference for digital to come up with a more
#cleaner and
# implementable BNF.
# - It was decided that since its a fairly big cleanup it may not meet
#the
# Sept 22nd deadline. So this will be the major activity post 2.1
#release
# - New updated BNF for Verilog-AMS will be released as a LRM 2.2
#version
# before the end of the year.
#
#* Hope to have version 2.1 of LRM sometime in October.
#
#Next call: 16 Sept 2002
#
#Sri
#--
#Srikanth Chandrasekaran
#Global Software Group, EDA SBU
#Motorola Australia.
#Phone: +61-8-8168 3592 Fax: x3501
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