Verilog-AMS Committee Meeting

Subject: Verilog-AMS Committee Meeting
From: Sri Chandra (schandra@asc.corp.mot.com)
Date: Mon Mar 03 2003 - 00:03:07 PST

Next message: Sri Chandra: "Verilog-AMS language committee Meeting"
Previous message: Jonathan Sanders: "Verilog-AMS Meeting CANCELLED till further notice"
In reply to: Sri Chandra: "Re: VERILOG-AMS COMMITTEE MEETING"
Messages sorted by: [ date ] [ thread ] [ subject ] [ author ]

Hi all,

The Verilog-AMS technical committee recently approved LRM 2.1 version which is with the Accellera board for approval currently. We would like to have a meeting to discuss the priorities of the future work, to discuss what set of activities we take up as part of developing the language further, and also the direction of the Verilog-AMS language.

The main topics that are planned to be discussed are:
  a.. Sync'Up with current digital standards (SystemVerilog & 1364-2001)
  b.. Additional Verilog-AMS cleanup and extensions
  c.. Extensions for RF and MEMs
  d.. Extensions for SPICE device model support
We will have the next Verilog-AMS committee meeting on the 10th of March, 2:30pm, US PST. I am expecting the call duration to be about 2 hrs.

The callin numbers:
US: +1 866 779 0773
Intl: +1 334 309 0262
Pin: *3589511* (including the *)

Let me know if the date and time is inconvinient and i can see whether its possible to suit everybody's schedule.

cheers,
Sri

--
Srikanth Chandrasekaran
Global Software Group, EDA
Motorola Australia
Phone: +61-8-8168 3592 Fax: x3501
> > Colleagues,
> >
> > Topics to discuss are:
> >
> > -IEEE 1364 Sync up plans
> > -System Verilog Sync up plans
> > -Additional Verilog-AMS cleanup and extensions
> > -Extensions for RF and MEMs
> > -Extensions for SPICE device model support
> >
> > If you are unable to attend but desire to join the committee on a regular
> > basis please also let us know and we will make sure you get properly
> > involved.  Also, if you know of others in your company or other companies
> > that should be part of this committee please feel free to share this with
> > them.
> >
> > If you have any questions please feel free to let me or those on the
> > reflector know.
> >
> > Looking forward to hearing from each of you,
> >
> > Jon Sanders
> >
> > P.S. If you were sent this and are not on the Verilog-AMS reflector and
> wish
> > to be removed from mailings such as this, please reply back to me and I
> will
> > remove you from this list.  If you have an alternative from your company
> > that should be on the list please make sure I have that information or
> that
> > they are on the reflector.
> >
> >
> >
> > ***********************************************************
> > Jonathan L. Sanders
> > Product Engineering Director
> > Custom IC Solutions
> > Cadence Design Systems, Inc.
> > 555 River Oaks Pkwy
> > San Jose, CA. 95134
> >  INTERNET:jons@cadence.com    Tel: (408) 428-5654      Fax : (408)
> 944-7027
> > ***********************************************************

Next message: Sri Chandra: "Verilog-AMS language committee Meeting"
Previous message: Jonathan Sanders: "Verilog-AMS Meeting CANCELLED till further notice"
In reply to: Sri Chandra: "Re: VERILOG-AMS COMMITTEE MEETING"
Messages sorted by: [ date ] [ thread ] [ subject ] [ author ]

This archive was generated by hypermail 2b28 : Mon Mar 03 2003 - 00:11:19 PST