Subject: Verilog-AMS language committee Meeting
From: Sri Chandra (schandra@asc.corp.mot.com)
Date: Sun Mar 09 2003 - 16:52:26 PST
Hi all,
I was recently forwarded your email addresses because you were interested in one of the following:
* Device Modeling Extensions to Verilog-A
* RF/MEMS Extensions to Verilog-A
* General Interests and Participation in Verilog-AMS
Please find attached an announcement for the next Verilog-AMS committee meeting that will discuss the priorities of future work...(Sorry for the short notice)
cheers,
Sri
----- Original Message -----
From: Sri Chandra
To: Vassilios.Gerousis@Infineon.com ; peterl@xpedion.com ; verilog-ams@eda.org ; david.smith@synopsys.com
Cc: dennisb@Model.com
Sent: Monday, March 03, 2003 6:33 PM
Subject: Verilog-AMS Committee Meeting
Hi all,
The Verilog-AMS technical committee recently approved LRM 2.1 version which is with the Accellera board for approval currently. We would like to have a meeting to discuss the priorities of the future work, to discuss what set of activities we take up as part of developing the language further, and also the direction of the Verilog-AMS language.
The main topics that are planned to be discussed are:
a.. Sync'Up with current digital standards (SystemVerilog & 1364-2001)
b.. Additional Verilog-AMS cleanup and extensions
c.. Extensions for RF and MEMs
d.. Extensions for SPICE device model support
We will have the next Verilog-AMS committee meeting on the 10th of March, 2:30pm, US PST. I am expecting the call duration to be about 2 hrs.
The callin numbers:
US: +1 866 779 0773
Intl: +1 334 309 0262
Pin: *3589511* (including the *)
-- Srikanth Chandrasekaran, Motorola Australia Phone: +61-8-8168 3592 Fax: x3501
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