Subject: $display task in Verilog-AMS
From: Sri Chandra (schandra@asc.corp.mot.com)
Date: Tue Aug 12 2003 - 09:07:26 PDT
There was discussion in the device modeling committee in being able to print statements at the end of every iteration as opposed to end of the timestep. The current $strobe syntax in Verilog-AMS prints at the end of every timestep.
The proposal was to have a task called $debug which will print for every iteration. However, currently VerilogAMS also supports a task called $display. The current AMS LRM specifies that $display would be treated same as $strobe. I was wondering instead of introducing a new syntax called $debug whether $display should be used to print every iteration and reuse existing syntax already defined in the language.
$strobe/$fstrobe -- every timestep
$display/$fdisplay -- every iteration
$monitor/$fmonitor -- print if value changes
The language already specifies the file equivalent functions for all these tasks.
Any thoughts?
cheers,
Sri
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