Subject: Model cards
From: Peter Liebmann (peterl@xpedion.com)
Date: Tue Sep 30 2003 - 16:15:12 PDT
Enclosed is an example of how to make Verilog-a syntax sort of look like
SPICE syntax (.model cards).
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S. Peter Liebmann, Ph.D.
Xpedion Design Systems, Inc.
Tel: 408-449-4024
E-Mail: peterl@xpedion.com
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