Accellera's decision on Two Verilogs (fwd)

From: Kevin Cameron <edaorg@v-ms.com>
Date: Thu May 27 2004 - 11:09:21 PDT

---------- Forwarded message ----------
Date: Thu, 27 May 2004 08:10:28 -0700
From: Michael McNamara <mac@verisity.com>
To: Btf@boyd.com, etf@boyd.com, ptf@boyd.com, 1364@accellera.org
Subject: Accellera's decision on Two Verilogs

Colleagues:

I hereby report back to you on the results of the P1364-Accellera
collaboration meeting.

A motion at Accellera to transfer SystemVerilog 3.1a to the IEEE P1364
Working group failed.

A motion to transfer SystemVerilog 3.1a to a new working group
sponsored under the IEEE-CAG passed.

A motion to request that this new working group send a liaison to the
IEEE-P1364 Working group passed.

Some implications of all of this actually remains in doubt, as per
IEEE rules, the IEEE-CAG has asked DASC if the DASC is interested in
sponsoring this new working group, and DASC has expressed interest.

Because of this, and because I am an optimist, I still see some glimmer
of hope for a reunification of this work into a single standard; but
todays step was very definitely away from such a future.

--
Michael McNamara, Chairman, IEEE 1364 Working Group  <mac@verilog.com>
                  Sr VP Technology, Verisity Design  <mac@verisity.com>
                  W 650-934-6888    F 650-934-6893     M 408-348-7025
Received on Thu May 27 11:09:29 2004

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