RE: Verilog-AMS LRM Committee Meeting

Our company has a holiday on the 5th so the 6th (in the US) would work better for me.
Thanks,
--Martin

> -----Original Message-----
> From: owner-verilog-ams@eda.org [mailto:owner-verilog-ams@eda.org] On
> Behalf Of Chandrasekaran Srikanth-A12788
> Sent: Tuesday, June 29, 2004 7:27 AM
> To: 'verilog-ams@eda.org'
> Subject: Verilog-AMS LRM Committee Meeting
>
> Hi all,
>
> I apologize for some confusion regarding the schedule of the verilog-ams
> committee conference calls this month. I have been on travel for most of
> the time during this month and also to top that i dont have a functioning
> laptop (refused to work last week onwards).
>
> I will be back in Australia end of this week - So we can schedule the next
> conference call on 5th of July, 4:30pm, Pacific time (I am not sure
> whether the next monday is a public holiday or not in the US). If thats
> the case we will have the call scheduled for 11th of July, same time.
>
> I would mainly like to discuss the presentation of Device Modelling to the
> Accellera Board during DAC, and also would like to have some discussion to
> clarify our plans for LRM2.2 which mainly includes all the device
> modelling extensions that have been proposed (including m-factor and
> paramset proposals that are currently being discussed).
>
> Sorry for any inconvinience with regards to this.
>
> Regards,
> Sri
Received on Tue Jun 29 08:45:30 2004