Re: LRM Committee Call - 11/15/04 minute meetings

From: Kevin Cameron <kcameron@altera.com>
Date: Wed Nov 17 2004 - 09:29:33 PST

Martin O'Leary wrote:

>Attendees: Jon Sanders, Jim Barby, Patrick O'Halloran, Martin O'Leary, Shekar Chetput
>
>See below for the minutes for each agenda item.
>
>
>
>>-----Original Message-----
>>From: owner-verilog-ams@eda.org [mailto:owner-verilog-ams@eda.org] On
>>Behalf Of Chandrasekaran Srikanth-A12788
>>Sent: Monday, November 15, 2004 4:05 PM
>>To: Verilog-AMS LRM Committee
>>Subject: LRM Committee Call
>>
>>
>>Hi all,
>>
>>I will not be able to make it for today's schedule LRM committee meeting
>>scheduled for 4:30pm US Pacific Time. Given that it's at the last minute I
>>would like the call to still go ahead. I will be joining you all for the
>>next regular call which would be in two weeks time.
>>
>>(If for some reason, there arent enough participants or if the call doesn't
>>happen - I would like to have the call next Monday - 22nd November, 4:30pm
>>Pacific time).
>>
>>Agenda:
>>
>>* Merge with IEEE 2001 standard (for which quite an amount of work has
>>already been invested, and the draft is in good shape)
>>
>>
>
>
>Our understanding is that;
>This is a first step for SV.
>
>
I'm wondering how this is going to work since most of the IEEE effort
has shifted to SV. I don't think you'll find anyone keen on working on a
new rev of an old standard, so I doubt it will ever get ratified (and I
see no point in another Accellera standard).

SV is still in a state of flux, IMO it would be better to go in at the
deep end and merge with the latest rev of that.

>The syntax has already been reviewed last summer and agreed.
>Next Steps:
>* Roll changes into sections along with semantic notes
>* Incorporate things of value to analog from V2001 into the analog block e.g. file reading, variable initialization.
>AI: Jon to prepare the list of the potential items. Committee to go through at the next meeting and make a recommendation for each and add additional items if required.
>* Resolve any potential conflicts with V2001 and existing Verilog-AMS e.g. the genvars.
>
>
>
>>* Resolve the keyword conflict in discipline logic with SV
>>
>>
>AI: Martin to send proposal for this.
>
>
Thought that had been covered already.?

>>* Updates to $table_model proposal.
>>
>>
SV has much better C/C++ interfacing, can table models be supported that
way (outside the committee/LRM)?

>Martin said that Cadence customers wanted variable spacing....
>
>
>* Issue: Do we need to provide a precise algorithm in the LRM? Or is a more general description okay.
>
>
>
...

>* How do we go about SystemVerilog and integration of AMS with SV.
>
>
I think you need to donate the current LRM to the IEEE ASAP, and create
a subcommittee of P1800 to handle the integration - but I'm not too
familiar with how that works. Dennis Brophy, Victor Berman or David
Smith (to name but a few) could probably outline the process.

>* AI: Sri to find SystemVerilog expert(s) to describe the differences and help with the integration.
>
>
All the experts can be found on the SV reflectors
(http://www.eda.org/sv-ec [-bc,-cc,...] /hm).

>* Process would then be to go through the same steps as syncing with V2001; syntax first, then look for conflicts, then value-add.
>
>* Committee expect that this will be a lot of work. Not clear how long it will take. Also see that SV is a moving target which also makes this challenging.
>
>
It will take a lot longer if AMS is continually an afterthought in the
LRM process. AMS needs to part of the IEEE SV development effort as
soon as possible.

>* Issue: Committee should also examine important requests from the A/MS user base - e.g. RF support.
>
>
The new (user defined) data-types in SV will help in supporting RF.

Kev.

>* Issue: Committee should also get closure on clean-up items and typos.
>
>
>
>>Call Details:
>>
>>Date: 15 Nov 2004
>>Time: 4:30pm Pacific Time
>>Dialin Number & Passcode:
>>----------------------------------------
>>USA Toll Free Number: 877-346-8823
>>USA Toll Number: +1-203-320-0407 (for international call-in) PARTICIPANT
>>PASSCODE: 602538
>>
>>Cheers,
>>sri
>>--
>>Srikanth Chandrasekaran
>>Freescale Semiconductors, Australia
>>Ph: +61-8-8168 3592 Fax: 3501
>>
>>
>
>
>
>
>
Received on Wed Nov 17 09:29:44 2004

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