VerilogAMS LRM2.3 Committee call agenda

From: Chandrasekaran Srikanth-A12788 <Srikanth.Chandrasekaran@freescale.com>
Date: Mon Nov 29 2004 - 00:34:13 PST

Hi all,

Since I didn't receive any objection to the change in time (possibly because most of the US was on holiday), I am tentatively scheduling tomorrow's call at 1:30pm Pacific time. If this is inconvinient/short notice, I can move the call for next week. If there is no response, I am assuming everybody is okay with the call time.

Agenda:

* Merge with IEEE 2001 standard - discuss on the specific dates, sections impacted and amount of resources
* Resolve the keyword conflict in discipline logic with SV - Expecting proposal from Martin
* Updates to $table_model proposal.
* Extend mixed signal analysis scheduling semantics and algorithm for non transient analysis (DCSweep, AC, Noise etc)

Call Details:
Date: 15 Nov 2004
Time: 1:30pm Pacific Time
Dialin Number & Passcode:
----------------------------------------
USA Toll Free Number: 877-346-8823
USA Toll Number: +1-203-320-0407 (for international call-in) PARTICIPANT PASSCODE: 602538

Cheers,
Sri

--
Srikanth Chandrasekaran
Freescale Semiconductors, Australia
Ph: +61-8-8168 3592 Fax: 3501
Received on Mon Nov 29 00:33:31 2004

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