LRM Committee meeting Agenda - 31st Jan 2005

Agenda:

* IEEE 2001 syntax merger
  - Go over the changebar work done with the integration of the Compact model updates in the new syntax
  - List of changes Graham has proposed for changes in the individual sections
  - Geoffrey raised a query regarding integrating with 1364-2005 directly?

  The draft version of this document is available at http://www.eda.org/verilog-ams/htmlpages/public-docs/syntax_2.3_draft.pdf

* $table_model updates
  - Any further feedback on mail sent by Martin regarding the extensions to the current syntax
  - Clarification (from patrick) regarding user request to have more control on interpolation technique?
  - Extensions currently being discussed are:
    a) more than one dependent variable (multiple output variables for the same table_model)
    b) skipping data within a table model and intrepretting the same data as either dependent vs independent based on arguments
    c) Mutliple formats of input file for the table model vs supporting one format defined by the language.
    d) Spilitting the functionality of $table_model into building the model and interpolation as function seems to be getting bulky.
    e) More complete description of isolines and possible use of higher order interpolation techniques that can be used for table_model
    f) Specification of multiple return values from the $table_model function

Date: 31 Jan 2005
Time: 1:30pm Pacific Time

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Cheers,
Sri

--
Srikanth Chandrasekaran
Freescale Semiconductors, Australia
Ph: +61-8-8168 3592 Fax: 3501