RE: scalar

Correct.

Integer values are scalars or vectors.
Reals are separate.
Event variables are also separate.
SystemVerilog defines additional types of variables as well.

Shalom


On Wed, 2 Mar 2005, Jonathan David wrote:

>  
> Well thats NOT the definition I learned in college, but in a world where
> any signal larger that 1 bit is a "vector" I suppose that could be
> true.. 
> but a "real" is not a vector, even though a computer representation
> takes many bits. 
> 
> 
> Jonathan David   Mixed-Signal IC 
> jbdavid@cadence.com Ph (408)894-2646
> 
> -----Original Message-----
> From: owner-verilog-ams@eda.org [mailto:owner-verilog-ams@eda.org] On
> Behalf Of Shalom.Bresticker@freescale.com
> Sent: Sunday, February 20, 2005 12:01 AM
> To: Helwig Graham-A11558
> Cc: VerilogAMS Reflector
> Subject: scalar
> 
> Just by the way, your 10.4.2 says, 
> 
> "The analog function declaration implicitly declares a scalar variable
> ... This variable either defaults to real or ..."
> 
> I think this is an incorrect usage of "scalar".
> In 1364, "scalar" denotes a 1-bit value. A real is not a scalar.
> 
> > Attached is an example of how I would go about merging the analog UDF
> definition into the 2001 UDF section. 
> 
> Shalom
> 
> 

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Shalom Bresticker                        Shalom.Bresticker @freescale.com
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