RE: absdelay and changing td

The reason for a constant max_delay is implementation efficiency.  It
bounds the buffering of past values that must be maintained in order to
properly delay the waveform.  Allowing the td to vary within a bounded
range does not compromise that efficiency. What modeling purpose there
is to having a waveform that is delayed a varying amount is not very
clear to me.  I presume the primary intent is to play a role in iterated
analyses, where td is swept within max_delay. My $0.02 :-)

 

Regards, John Shields

 

________________________________

From: owner-verilog-ams@eda.org [mailto:owner-verilog-ams@eda.org] On
Behalf Of marq.kole@Philips.com
Sent: Thursday, March 03, 2005 7:02 AM
To: VerilogAMS Reflector
Subject: Re: absdelay and changing td

 


Geoffrey, 

I would definitely agree that the wording in the last two sentences
states that td is always ignored. 

With respect to the intent, I can only guess, but I could imagine that
the delay would be mapped on precalculated timepoints and that the
maxdelay is used to get an optimal (shape-preserving) mapping on current
time-points? 

Maybe it's a kind of an analogy to auto time series in a transient
simulation. For instance, the Newton iteration for a new time point
could create a solution at a delay time that that is not exactly td, but
will not be more than maxdelay. 

The actual reason for using such a thing escapes me, though. 

Regards, 
Marq