Re: $finish and @(final_step())

Prasanna,

In my interpretation of the LRM, and the use of finish in general in 
analog simulators, it is a breakout option to stop a simulation 
prematurely. In most cases I would say that the use is because an error 
condition has been recognized and further simulation is no longer usefull.

If one already knows that a $finish can occur prematurely, i.e. before the 
end of the actual simulation time, so before a trigger of the final_step 
event, one can design the handling to include a graceful exit by executing 
the right code (for instance by wrapping all code handling the graceful 
exit and the $finish code  in conditional expression on a local flag, so 
for instance:

module analogFinish;

  real do_finish;
  analog begin

    @(initial_step("static")) begin
       do_finish = 0;
       // some file opens
    end

    if ($abstime > 0.7) begin
      $strobe("%m About to call analog finish");
      do_finish = 1;
    end

    if (do_finish > 0) begin
      // some file closes
      $finish(0);
    end

    @(final_step("tran")) begin
      $strobe("%m >> Time %g: '@(final_step('tran'))' event has fired.", 
$abstime);
      // some file closes
    end
  end
endmodule

There is some double code in here (for file closing) - so it would be nice 
if that could be handled by a function call.

What is not in the standard is whether an exit from $finish should be 
graceful, i.e. close all open files, and flush all buffers before exiting. 
A similar goes for the $stop, where you probably want to flush buffers 
before the actual suspend.

Regards,
Marq


Marq Kole
Competence Leader Analog Simulation, Philips ED&T

Building WAY 3.069, Professor Holstlaan 4,5656 AA Eindhoven, The 
Netherlands
Tel. +31 40 27 44875, Fax. +31 40 27 44700
marq.kole@philips.com, www.research.philips.com










Tamhankar Prasanna-A14507 <Prasanna.Tamhankar@freescale.com>
Sent by: 
owner-verilog-ams@eda.org
21-04-2005 09:57
 
        To:     verilog-ams@eda.org
        cc:     (bcc: Marq Kole/EHV/RESEARCH/PHILIPS)
        Subject:        $finish and @(final_step())
        Classification: 




Hi all,

LRM says "final_step generates global events only on the last point in an 
analysis" (section 6.7.4), however, should final_step  event trigger if a 
$finish is encountered ? Consider a case where say some files were opened 
(in initial_step) and are to be closed in final_step. If a $finish event 
happens before the simulator reaches the simulation end time, it will be 
nice to trigger the final_step so as to close all the files. 

I have included two example modules below, the first one is purely analog, 
second one is mixed signal.

module analogFinish;

  analog begin

    @(initial_step("static")) begin
       // some file opens
    end
    if ($abstime > 0.7) begin
      $strobe("%m About to call analog finish"); 
      $finish(0);
    end

    @(final_step("tran")) begin
      $strobe("%m >> Time %g: '@(final_step('tran'))' event has fired.", 
$abstime);
      // some file closes
    end
  end
endmodule

`timescale 1ms / 1ms
module digitalFinish;
  initial begin
     #700;
     $display("Time %g: Digital $finish(0) is about to occur.", 
$realtime);
     $finish(0);
  end
  analog begin
    @(initial_step("static")) begin
     // some file open
    end
 
    @(final_step("tran")) begin
      $strobe("%m >> Time %g: '@(final_step('tran'))' event has fired.", 
$abstime);
      // some file close
    end
  end
endmodule

Also, in this module digitalFinish, assume that the analog and the digital 
engines synchronized at 0.6 seconds. Analog takes a step to say 0.74 
seconds and then the digital tries to catch up, but at 0.7 (#700) 
encounters a $finish. Should the analog  engine then synchronize with 
digital by backing-up from 0.74 to 0.7 and then end the simulation ?

Best regards,
Prasanna