I apologize to all (especially prasanna since it looks like he was the only one who dialed in) for completely forgetting about the call this week and not organizing it.
Received on Wed Jun 22 23:02:33 2005Call next week ? Hi all,
Looks like I was the only one who dialled in yesterday for LRM call ;-) Sri is travelling at the moment so no reminders were sent, anyway, how about call next week ( on 28th of June US date) ? The agenda remains the same.
Cheers,
Prasanna
------------------------------------------------------
Prasanna Tamhankar
Freescale Semiconductors, Adelaide
+61 8 81683585
------------------------------------------------------> From: owner-verilog-ams@eda.org
> [mailto:owner-verilog-ams@eda.org] On Behalf Of
> Chandrasekaran Srikanth-A12788
> Sent: Tuesday, 7 June 2005 5:28 PM
> To: 'VerilogAMS Reflector'
> Subject: LRM Committee Meeting for 7 June 2005
>
>
>
> Hi all,
>
> I plan to postpone the meeting scheduled for 7th June and
> have the next one on the 21st of June. The status of the
> following items are as follows:
>
> 1. AC, DCSweep MS proposal - Martin's feedback was received
> just now. I don't think there is sufficient time for
> australia to analyse this before discussion tomorrow morning
> (australian time). No further feedback on this.
>
> 2. Table_model proposal: No update on this. Current Status:
> Requirements have been clarified (& frozen), waiting for the
> updated proposal.
>
> 3. Migrating open issues to SV-AMS system: No update on this,
> as far as I know, this hasn't yet been setup for Verilog-AMS.
> I am thinking I will go ahead and just for the time being
> send out the spreadsheet format again which can be discussed
> in the next call
>
> 4. Cadence SV-AMS Strawman proposal: No updates on this yet.
>
> Regards,
> Sri
>
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