RE: SPICE compatibility issues

Brian,

Wow!  This is quite interesting...  I am curious
how versatile that program is.  Can it handle
various types of buffers, IBIS features, or is
it limited?  What language was it written in?
Would it be possible to get a copy of it,
perhaps update it?

Thanks,

Arpad
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-----Original Message-----
From: Brian Mulvaney <rzwe90> [mailto:brian.mulvaney@freescale.com] 
Sent: Tuesday, August 02, 2005 12:40 PM
To: Muranyi, Arpad
Cc: verilog-ams@eda.org
Subject: RE: SPICE compatibility issues


Hello Arpad,

Many years ago one of my colleagues, Bob Garbs, wrote an Ibis2 to
Verilog-A translator. This work pre-dated the $table_model of
Verilog-AMS, so the generated Verilog-A model is somwhat uglier than
it would need to be nowadays. Below is an example output of his
program, run on (I believe) the tristate buffer example from the NCSU
s2ibis2 webpage. I had to manually change the Verilog-A 'generate'
statements to analog for loops, which may give you some idea of just
how old this program is.

I don't know if this will be useful to you at all - probably just of
some mild historical interest.

Regards,
Brian M.