I would NOT assume this is something you can get with PLI.. while I haven't tried PLI at all yet.. I would generally have expected it to be limited to the digital side of the engine.. so to get such information out would require collecting the data in the analog solver and waiting for the next digital event before you could export the information to the environment.. and if its a simulator problem you are trying to debug, that event might never happen! without simulator access that would probably be my prototype approach though.. jbd --- edaorg@v-ms.com wrote: > > Not sure what $debug does particularly, but it > crosses my mind that > we don't have the equivalent of C's ... argument > handling in Verilog-AMS > or SystemVerilog which would make it easier to write > your own routines > for this kind of thing. Maybe we should just add > something like that > which might be more generally useful. > > I assume you can currently get the $fdebug > functionality through PLI etc. > at the moment, so it's probably not an essential > enhancement, and I would > therefore suggest not adding it at this time but > leave it until after > merging with SystemVerilog. > > Kev. > > > > > All, > > > > On behalf of the compact device modelling group in > Philips Research I have > > the request for a $fdebug system call. This would > essentially be the same > > as the $debug system call, but writing to > specified file instead of the > > regular (simulator-dependent) output. The > rationale behind this is in > > separating $debug calls from several devices, > allowing regression testing > > of model performance vs. simulation algorithm, and > more efficient > > post-processing of large amounts of data from > $debug calls. > > > > Here is an example of such use: > > > > integer fp; > > > > analog begin > > @(initial_step) > > fp = fopen("mosmodel.debug"); > > > > ... > > $fdebug(fp, "%M: Ids = %g", I(ds)); > > ... > > > > end > > > > Before I make an entry in the Mantis database, I > would like to know > > whether this would be an acceptable proposal. > > > > Regards, > > Marq > > > > > > Marq Kole > > Competence Leader Analog Simulation, Philips ED&T > >Received on Mon Dec 12 09:54:31 2005
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