discipline vs signal name conflicts

Gent's, I actually have a question / problem with the
standard as its defined today.. 


In appendix D1 we have published the default
disciplines.vams file.. 
in here the default access function for the "charge"
nature is defined to be "Q"..  which creates a problem
every time I try to write a verilog-A model (ie with
electrical disciplines) of any of the storage elements
in a standard cell library.. 

Granted that this is the most natural symbol for us to
us for Charge, and I certainly didn't think much about
those many years ago when I first started to use
VerilogA, but I do think that the digitial guys
adopted their convention first.. and that we should
either CHANGE the "default" access function to "qq" or
"Qq" or even "QQ" would be OK..  or allow  signal
names that confict with access functions used with the
discipline associated with that signal.. 

Otherwise we can approach the "ALF" folks to see if we
can talk them in to changing the convention that "Q"
is the non-inverted output of a latch or flip-flop
gate..

IE my favorite simulator doesn't make it easy (not
impossible but not easy!!) to customize the default
displpines file so that this problem is eliminated..
nor to use a local definition of the current nature in
this block that doesn't use Q as the access function
for charge.. 

-- Ah so here's an idea, why not allow a LOCAL
redefinition of the discipline so that an alternate
access function can be use in the verilog-A model of
the flip flop.. 

(last time I tried this "my favorite simulator"
complained when I tried to use this and connect it to
a discipline with the same name, and altered
definition.. )

If I can reconnect to my session today I may give it
another try.. 
Jonathan David
MSDV engineer
Scintera