Pass-By-Reference vs Copy-in-Copy-out

Question:

Verilog never had 'pass by reference', only CICO. Pass by reference was
added by SystemVerilog. Inout function arguments were also never in
Verilog and added by SystemVerilog.

Does it make sense to repeat inout function arguments?

Shalom

>    - Pass-By-Reference vs Copy-in-Copy-out: Currently AMS
> supports only
> CICO rather than pass-by-reference. This works equivalent for
> most
> cases, however when arguments are repeated in the arglist and
> set inside
> the UDF this can lead to indertiminate values as pointed by
> David.
> Subsequent to the meeting Geoffrey has posted an example.