Verilog-AMS committee meeting agenda - 28 March 2005

Hi all,

Time & Date: 28 March 2006, 1:30pm Pacific time
USA Toll Free Number: 877-346-8823
USA Toll Number: +1-203-320-0407 (for international call-in)
PARTICIPANT PASSCODE: 602538

Agenda:
* Going through approval of minor mantis items posted by Geoffrey
   - (mail sent by Geoffrey on 22nd March "Mantis proposals ready")
* Timelines for individual section updates (hopefully all the owners 
would have a rough estimate for their sections that we could discuss). I 
have attached the email below with the chapters and owners
* Call time from next week onwards


Regards,
Sri

-------- Original Message --------
Subject: Ownership of individual chapters for LRM2.3
Date: Fri, 09 Dec 2005 15:50:55 +1030
From: Sri Chandra <srikanth.chandrasekaran@freescale.com>
Organization: Freescale Semiconductor Inc.
To: Verilog-AMS LRM Committee <verilog-ams@eda.org>

Hi all,

As discussed in the last call, we agreed upon the following assigned
owners for the individual sections. This would enable to work parallely
on the individual sections as we discuss & finalize the BNF that Graham
is working on. Given that we plan to document the semantics better and
since we are integrating more tightly with the digital 1364 standard,
its key to document the semantics and cross domain usage of some of the
syntax.

Chapter 1 - Dont expect much change
Chapter 2 - Lexical Conventions - Graham, Freescale
Chapter 3 - Datatypes - Geoffrey, Analog Devices
Chapter 4 - Expressions - Prasanna, Freescale
Chapter 5 - Signals - Geoffrey, Analog Devices
Chapter 6 - Analog Behavior - Sri, Freescale
Chapter 7 - Hierarchical Structures - Arpad, Intel & Marq, Philips
Chapter 8 - Mixed Signal (dont expect much changes) - Prasanna, Freescale
Chapter 9 - Scheduling Semantics (dont expect much changes) - Sri, Freescale
Chapter 10 - Sys Tasks & Functions - Martin, Cadence (Patrick, Tiburon
for $table_model)
Chapter 11 - Compiler Directives - Graham, Freescale
Chatper 12 & 13 - VPI - TBD later (need to ensure AMS extensions are
maintained)

Annex A - Syntax - Graham
Annex E - Spice Compatibility - Marq Kole
Other Annex - TBD later

For items from Mantis that volunteers are working on that affects some
of the above sections please work with the assigned person while working
on the item.

I will send the frame documents over to the assigned owners very soon.

Regards,
Sri
-- 
Srikanth Chandrasekaran
Design Technology (Adelaide)
Freescale Semiconductor
Ph: +61-(0)8-8168 3592 Fax: x3201


-- 
Srikanth Chandrasekaran
DTO, Tools Group
Freescale Semiconductors Inc.
Ph: +61-(0)8-8168 3592 Fax: x3201