Re: Merged version of chapter 6

Geoffrey,

All simulators I use will give an error for values outside the range -1, 
0, and +1. That includes Cadence!

Cheers,
Marq










"Geoffrey.Coram" <Geoffrey.Coram@analog.com> 
Sent by:
owner-verilog-ams@server.eda-stds.org
16-06-2006 15:19

To
Sri Chandra <srikanth.chandrasekaran@freescale.com>
cc
Ken Kundert <ken@designers-guide.com>
VerilogAMS Reflector <verilog-ams@server.verilog.org>
Subject
Re: Merged version of chapter 6
Classification







I guess there are two possibilities that might have been implemented:
1) other values disable the cross
2) any positive value is interpreted as +1, any negative as -1

Ken says that Cadence uses (1).  Are there any simulators that do (2)?

The sentence I copied from the LRM seems to indicate that it would be
an error to use a value other than 0,+1,-1 (though the LRM doesn't
quite use IEEE-standard language (shall)).

-Geoffrey



Sri Chandra wrote:
> event. I am not sure how many implementations interpret it in that
> fashion ie. arguments not +1, 0, -1 disable the cross, and this is going
> to lead to compatibility issues with existing implementations.
>