Verilog-AMS Committee Meeting Reminder - 17 Nov 2006

From: Marq Kole <marq.kole_at_.....>
Date: Mon Nov 13 2006 - 07:22:15 PST
Hi all, 

Date & Time: 17th Nov 2006, 3:00-4:00pm Pacific

Call-In Details:
  USA Toll Free Number: 877-346-8823
  USA Toll Number: +1-203-320-0407 (for intl)
  Participant Passcode: 602538

The call time for this week will be: 

03:00 PM Pacific   (Thursday) 
06:00 PM Eastern   (Thursday) 
03:30 AM India     (Friday) 
09:30 AM Adelaide  (Friday) 
12:00 PM Eindhoven (Thursday) 

Agenda:
   * Review of section 7 "Hierarchical Structures" , continuing with 
section 7.5.2.
   * Status of upcoming review work (what's next) 
   * Reconsideration of meeting time 

An update of the section 7 document has been posted, I propose to use the 
new document for the continued review. The current document has been 
uploaded to the public document section of the Verilog-AMS  website.
http://www.eda.org/verilog-ams/htmlpages/public-docs/merged_hier.pdf

Thanks,
Marq


Marq Kole
Competence Leader Robust Design

Research
NXP Semiconductors
Received on Mon Nov 13 07:24:04 2006

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