Re: Why is type for string parameters mandatory?

From: Marq Kole <marq.kole_at_.....>
Date: Wed Nov 15 2006 - 00:02:25 PST

Dave,
Do these digital simulators use these string parameters as we do, or can they assign these string parameters as default values to string registers?

As far as I can tell in AMS you can only compare string parameters against string constants or other string parameters, or use them as a string argument in display tasks. No connection is made between the string parameters in AMS and the string registers in 1364-2005.

Does SystemVerilog have (extended) support for string parameters?

Cheers,
Marq


Marq Kole
Competence Leader Robust Design

Research
NXP Semiconductors







Dave Miller <David.L.Miller@freescale.com>

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owner-verilog-ams@server.eda.org

14-11-2006 18:22

To
Verilog-AMS LRM Committee <verilog-ams@server.eda.org>
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Subject
Why is type for string parameters mandatory?
Classification





Hi all,
I am just wondering why do we explicitly say that the type specification
for a string parameter is mandatory?
Why can't we allow the type to be derived based upon the default
expression.
Do you think we could remove this restriction in 3.2.1 and just mention
that if no type is specified and the parameter is assigned a default
value of a string, then the type of the parameter will be string and it
will be an error if the parameter is overridden with any numerical value.
This is causing me some problems at the moment as some digital
simulators that I am using allow string parameters to be defined without
the type. In fact if I understand digital correctly (2005) you can't
actually have a string parameter (only string registers) but that is a
separate issue.

Dave

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Received on Wed Nov 15 00:02:47 2006

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