RE: Why is type for string parameters mandatory?

From: Bresticker, Shalom <shalom.bresticker_at_.....>
Date: Thu Nov 16 2006 - 02:12:59 PST
I think this is legal in SystemVerilog.

> Digital explicitly disallows me to declare a string parameter as:
> parameter string myParam = "abc";

Shalom
Received on Thu Nov 16 02:14:09 2006

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