Re: Verilog-AMS Committee Meeting Reminder - 30 Nov 2006

Sorry, the date in the body of the email should read 30th November. 
(thanks Jim)

cheers,
Sri

Sri Chandra wrote:
> Hi all,
> 
> Date & Time: 17th Nov 2006, 9-10pm Pacific
> 
> Call-In Details:
>  USA Toll Free Number: 877-346-8823
>  USA Toll Number: +1-203-320-0407 (for intl)
>  Participant Passcode: 602538
> 
> The new call times are:
> 
> 09:00 PM Pacific   (Thursday)
> 11:00 PM Central   (Thursday)
> Midnight Eastern
> 07:00 AM Eindhoven (Friday)
> 10:30 AM India     (Friday)
> 03:30 AM Adelaide  (Friday)
> 
> Agenda:
>   * Review the updated Section 7 "Hierarchical Structures"
>     - new subsection 7.5.2.1
>     - new sections 7.8.1, 7.8.2, 7.8.3, 7.8.4
>     - Document available at: 
> http://www.eda-stds.org/verilog-ams/htmlpages/public-docs/merged_hier.pdf
> 
>   * Briefly go over some of the discussions I have had with Karen Pieper 
> (SV Committee) with regards to AMS and P1800 standards
> 
> cheers,
> Sri

-- 
Srikanth Chandrasekaran
DTO Tools Development
Freescale Semiconductor Inc.
Ph: +91-120-439 7021 F: x5199