RE: multiple analog blocks

From: Marq Kole <marq.kole_at_.....>
Date: Fri Dec 22 2006 - 00:20:34 PST
Shalom, David,

This is an interesting by-product of a badly constructed sentence on my 
side. We should definitely add this notion to the LRM 2.3 syntax and 
extend section 2 (if necessary) to describe this.

Cheers,
Marq


Marq Kole
Competence Leader Robust Design

Research
NXP Semiconductors









"Bresticker, Shalom" <shalom.bresticker@intel.com> 
Sent by:
owner-verilog-ams@server.eda.org
22-12-2006 04:58

To
"Dave Miller" <David.L.Miller@freescale.com>
cc
<verilog-ams@server.verilog.org>
Subject
RE: multiple analog blocks
Classification







Yes, from 1364-2001, though it is not synthesizable.

> I don't quite follow. Variable initialization when declaring the
> variable is already part 1364-2005?

Shalom
Received on Fri Dec 22 00:21:11 2006

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