Re: Verilog-AMS Committee Meeting Minutes - Mar 1st 2007

Mark,
    I sent the following just to Geoffrey, but after seeing your
message, I though maybe everyone would like to see how Spectre uses
string output variables.

-Ken

> Geoffrey,
>     Spectre uses output variables (it calls them output parameters) both
> for plotting of results and also for generating operating point reports.
> Strings would make more sense in the latter. Spectre also allows enums
> to be output. These are strings that have an index (one string from an
> finite ordered set of possibilities). These are used to represent, among
> other things, the operating region of devices. For example, bsim3v3
> outputs region={off, triode, sat, subth, breakdown}. If plotted, 0 is
> used to represent off, 1 represents triode, etc.
> 
> -Ken

Verilog-AMS does not support enums, but one can output strings as a way
of labeling states, modes, error conditions, etc. They could then be
revealed in an operating point report. And one could certainly imagine
waveform files and analysis tools becoming sophisticated enough to allow
engineers to place break points on output strings in order to stop at a
point where a model changes state, and perhaps even displaying the
string in the waveform display.

-Ken

Marq Kole wrote:
> 
> Geoffrey,
> 
> It was a question from a language point-of-view rather than an
> application point-of-view. I think indeed have string output variables
> has little merit, but if we decide so, we should make that explicit. I'm
> in favour of having as little as possible implementation dependent
> language constructs. Explicitly disallowing string output variables
> would actually have my vote.
> 
> Cheers,
> Marq
> 
> 
> Marq Kole
> Competence Leader Robust Design
> 
> Research
> NXP Semiconductors
> Tel: +31 40 27 49051, Fax: +31 40 27 44700, Mobile: +31 6 387 48 389
> High Tech Campus 48 p.2.039, 5656 AE Eindhoven, The Netherlands
> marq.kole@nxp.com, www.nxp.com
> 
> 
> 
> 
> 
> 
> 
> 
> *"Geoffrey.Coram" <Geoffrey.Coram@analog.com>*
> 
> Sent by:
> geoffrey.coram@analog.com
> 
> 15-03-2007 16:16
> 
> 	
> To
> 	Marq Kole <marq.kole@nxp.com>
> cc
> 	verilog-ams <verilog-ams@eda-stds.org>
> Subject
> 	Re: Verilog-AMS Committee Meeting Minutes - Mar 1st 2007
> Classification
> 	
> 
> 
> 	
> 
> 
> 
> 
> 
> What in the world is a string output variable, and how
> would you plot it??
> 
> -Geoffrey
> 
> 
> Marq Kole wrote:
>>
>> All,
>>
>> > * Martin to talk to Geoffrey about reworking Chapter 3 to support
>> > strings variables
>>
>> Just an idea, but should string variables also be supported as output
> variables, i.e. should section 3.1.1 be extended with string output
> variables as well?
>>
> 
> 
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