Verilog-AMS LRM committee meeting - 19th July 2007

Hi all,

Date & Time: 19th July 2007

Call-In Details:
    USA Toll Free: 877-346-8823
    USA Toll: +1-203-320-0407
    Passcode: 602538

Call times:
06:30am US Pacific
08:30am US Central
09:30am US Eastern
15:30pm Eindhoven
19:00pm Noida
23:00pm Adelaide

Agenda:
   - Chapter 8 (Mixed signal). Dave has made the changes for LRM2.3 on 
the mixed signal chapter which we will review.
   - $simprobe() proposal
   - $freq proposal

Coming up:
   - compiler directives (chapter 11 - Graham). Currently Graham is on 
vacation but hopefully we will be able to review this chapter by end of 
this month. The updates have already been done.
   - Chapter 9 (scheduling semantics - cadence): Martin to update status 
on this chapter.

cheers,
Sri
-- 
Srikanth Chandrasekaran
Design Technology (Tools Development)
Freescale Semiconductor Inc.
Ph: +91-120-439 7021 F: x5199

-- 
This message has been scanned for viruses and
dangerous content by MailScanner, and is
believed to be clean.