The updated document the chapter 8 can be found here: http://www.eda-stds.org/verilog-ams/htmlpages/public-docs/merged_mixedsig.pdf For $simprobe / $freq, we can probably just use the email thread. Cheers... Dave Sri Chandra wrote: > Hi all, > > Date & Time: 19th July 2007 > > Call-In Details: > USA Toll Free: 877-346-8823 > USA Toll: +1-203-320-0407 > Passcode: 602538 > > Call times: > 06:30am US Pacific > 08:30am US Central > 09:30am US Eastern > 15:30pm Eindhoven > 19:00pm Noida > 23:00pm Adelaide > > Agenda: > - Chapter 8 (Mixed signal). Dave has made the changes for LRM2.3 on > the mixed signal chapter which we will review. > - $simprobe() proposal > - $freq proposal > > Coming up: > - compiler directives (chapter 11 - Graham). Currently Graham is on > vacation but hopefully we will be able to review this chapter by end of > this month. The updates have already been done. > - Chapter 9 (scheduling semantics - cadence): Martin to update status > on this chapter. > > cheers, > Sri -- ===================================== -- David Miller -- Design Technology (Austin) -- Freescale Semiconductor -- Ph : 512 996-7377 Fax: x7755 ===================================== -- This message has been scanned for viruses and dangerous content by MailScanner, and is believed to be clean.Received on Wed Jul 18 13:16:11 2007
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