Re: current signal-flow discipline

Hi Sri,

This was a discussion - I believe of about a year ago - on having
signal-flow disciplines for both flow and potential. The difference comes
when connecting together more than two signal-flow blocks to the same node.
A potential signal-flow element can handle at most one driver, but multiple
readers; a flow signal-flow element can handle multiple drivers, but at
most one reader. At that time it was decided that the limitation on
allowing only potential signal-flow disciplines was too restrictive and
that we needed to allow flow natures for signal-flow disciplines as well.

Another item is the compatibility between signal-flow disicplines and
conservative - I think that was only meant as a side remark. However, as
I've been working on creating test benches for the current Verilog-AMS
examples on the Verilog-AMS standardization website a lot of the examples
were actually signal-flow defined, even though they should be useable in a
conservative environment as well. This is when I noticed the discrepancy
described in my initial email.

Cheers,
Marq




                                                                       
                                                                       
                                                                       
                                                                        To
                                       Marq Kole <marq.kole@nxp.com>   
                                                                        cc
     Sri Chandra                       verilog-ams                     
     <sri.chandra@freescale.co         <verilog-ams@eda-stds.org>      
     m>                                                            Subject
                                       Re: current signal-flow discipline
     31-01-2008 09:07                                                  
                                                                       
                                                                       
                                                                       
                                                                       
                                                                       




Marq,

Is clause 3.6.2.1 in error? For signal-flow disciplines the nature has
to be potential. Current contributions on these nodes are not legal as
the flow nature is not defined for signal-flow systems. There is a
reference made to this in clause 1.3.3 also and the details for
signal-flow is given in clause 1.3.4

cheers,
Sri

Marq Kole wrote:
> Hi All,
>
> The current draft 2 contains an ambiguity: in section 3.6.2.1 on Nature
> Binding an example signal-flow discipline show the current discipline
> with a flow nature, while Annex D.1 shows that in the disciplines.vams
> the current discipline still has a potential nature. In my opinion for
> Verilog-AMS 2.3 the disciplines.vams should be updated to make the
> current discipline have a flow nature.
>
> Currently, in Verilog-AMS 2.2 a module with terminals that have a
> signal-flow nature of current cannot be connected to a net of discipline
> electrical and assume that the current in one connects to the current in
> the other. With the above change this should be resolved.
>
> Cheers,
> Marq
>
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--
Srikanth Chandrasekaran
Design Technology (Tools Development)
Freescale Semiconductor Inc.
T:+91-120-439 5000 p:x3824 f: x5199

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