Re: [Fwd: Minutes of Verilog-AMS meeting - 31 Jan 2008]

From: Sri Chandra <sri.chandra_at_.....>
Date: Thu Feb 07 2008 - 09:39:39 PST
Can we impress upon the SV committee to extend the current syntax? I 
know it might be a difficult task but thought will ask rather than assume.

Regards,
Sri

Bresticker, Shalom wrote:
> No.
> 
>> Is there any plans to include constant seed argument 
>> (parameter) to P1800 standards?
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Srikanth Chandrasekaran
Design Technology (Tools Development)
Freescale Semiconductor Inc.
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Received on Thu Feb 7 11:13:48 2008

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