RE: [Fwd: Minutes of Verilog-AMS meeting - 31 Jan 2008]

From: Bresticker, Shalom <shalom.bresticker_at_.....>
Date: Thu Feb 07 2008 - 19:39:18 PST
There is a schedule problem. It would require permission from the P1800
Working Group.

Shalom 

> -----Original Message-----
> From: Sri Chandra [mailto:sri.chandra@FREESCALE.COM] 
> Sent: Thursday, February 07, 2008 7:40 PM
> To: Bresticker, Shalom
> Cc: Geoffrey.Coram; Verilog-AMS LRM Committee
> Subject: Re: [Fwd: Minutes of Verilog-AMS meeting - 31 Jan 2008]
> 
> Can we impress upon the SV committee to extend the current 
> syntax? I know it might be a difficult task but thought will 
> ask rather than assume.
> 
> Regards,
> Sri
> 
> Bresticker, Shalom wrote:
> > No.
> > 
> >> Is there any plans to include constant seed argument
> >> (parameter) to P1800 standards?
> 
> --
> Srikanth Chandrasekaran
> Design Technology (Tools Development)
> Freescale Semiconductor Inc.
> T:+91-120-439 5000 p:x3824 f: x5199
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