Re: Old int/logic -> real conversion handling proposal (re 4.2.1.2)

Kevin -
Unfortunately, that x/z language is found in 1364-2005, clause
4.8.2 (page 34 of the PDF).

I'm curious why 3.2.1 was taken out between VAMS drafts 2 and 3,
rather than 4.2.1.1 and 4.2.1.2.  The 1364-2005 paragraphs
on conversion are in the Data types chapter.

-Geoffrey



Kevin Cameron wrote:
> 
> http://www.eda-stds.org/verilog-ams/htmlpages/tc-docs/issues/0013/index.html 
> 
> 
> I think converting x/z bits to 0 is a recipe for disaster, the old 
> proposal was to produce a result of NaN (Not a Number) for the real 
> which is handled efficiently by floating point hardware, and only only 
> throw an error if NaN gets assigned to a branch. All reals without an 
> initial assignment should probably be initialized to NaN rather than zero.
> 
> Propose 4.2.1.2 becomes:
> 
>    Implicit conversion shall take place when an integer or logic
>    expression is assigned to a real. If any bits of the expression are
>    x or z then the real value becomes NaN (Not a Number). It is illegal
>    to assign NaN to a branch.
> 
> 
> - and add NaN as a keyword.
> 
> Kev.
> 

-- 
This message has been scanned for viruses and
dangerous content by MailScanner, and is
believed to be clean.